1. Field of the Invention
The present invention generally relates to a method and apparatus for electronic integrated chip manufacturing with enhanced thermomechanical properties.
2. Description of the Related Art
Traditional electronic packages employ a ceramic substrate to support a silicon die, but a ceramic package is highly costly. The coefficient of thermal expansion (CTE) for both the silicon die and the ceramic are close enough (about 3 ppm/° C.) that temperature excursions do produce comparable elongation of these elements. However, any difference in CTE subject to a change in temperature could produce shear and other forms of stresses in the solder ball connections (called C4s). Further, cyclic stresses can reduce the lifetime (i.e., service life) of a C4 connection where 0-pk value of the C4 stress and substrate stress substantially contribute to the lifetime of a package.
A current trend is to migrate towards lower cost organic substrates that have superior electrical characteristics, but not so desirable mechanical characteristics. The CTE of an organic substrate could be about 15 ppm/° C. (×5). The use of an organic package heavily depends on an underfill material that reduces the stress in C4s due to thermal cycling.
An underfill with a high elastic modulus relieves stress in C4s, but exerts higher stresses on the silicon die. The CTE differential also generates a radius of curvature following a cure process, thereby raising the risk that the die may crack or fail.
On the other hand, a lower elastic modulus of underfill exposes the C4s to the CTE mismatched cyclic stress. In all cases, the CTE mismatch results in a warped assembly at room temperature. A first conventional structure includes a design where the warpage tendency is reduced by a balance plate that counteracts the substrate.
The maximum operating temperature of a die assembly including a silicon die and a substrate is always kept lower than the glass transition temperature (Tglass) of an underfill. After a cure operation at a high temperature, the assembly is allowed to cool down to room temperature. Even though the cure temperature and the Tglass of an underfill are not identical, for simplicity they are treated as equal. The temperature excursion of Tg=125° C. to Troom=25° C. causes an assembly to warp as much as 150 μm on a 50×50 mm square substrate supporting a 20×20 mm die. This warpage is unidirectional (i.e., the die/substrate assembly goes from a planar shape to a concave system (as viewed from the die side)). The stress level in the substrate can be as high as 25 MPa in tension near the underfill zone, and compression on silicon can be as much as 30 MPa in compression.
The unidirectional warpage of the package thus creates large 0-pk excursions in warpage-induced stresses in the assembly.
Prior to the present invention, there has been no method or apparatus in which there is a new degree of design freedom in managing the warpage-free temperature of the assembly so that the 0-pk values are reduced by 50% at best.
Further, the conventional methods have not provided a method of enhancing the predicted life cycle of a self-standing assembly by reducing the peak stress by half. The reduction of peak stress during a temperature cycle reduces the extend of plastic deformation strain that is known to reduce the life cycle of a die package.